Chemical vapor deposition of silicate high dielectric constant materials

ABSTRACT

A method of fabricating an electronic device over a semiconductor substrate, the method comprising the steps of: forming a conductive structure over the semiconductor substrate (step  106  of FIG.  1 ); and forming a layer of high-dielectric constant material between the conductive structure and the semiconductor substrate (step  102  of FIG.  1 ), the layer of high-dielectric constant material is formed by supplying a gaseous silicon source and a second gaseous material which is comprised of a material selected from the group consisting of: Hf, Zr, La, Y, Sc, Ce and any combination thereof.

CROSS-REFERENCE TO RELATED PATENT/PATENT APPLICATIONS

[0001] The following commonly assigned patent/patent applications arehereby incorporated herein by reference: Patent No./Ser. No. Filing DateTI Case No. **/**/1997 TI-24953 TI-27181 TI-22027 TI-24776 TI-27953

FIELD OF THE INVENTION

[0002] The instant invention pertains to semiconductor devicefabrication and processing and more specifically to a method offabricating a higher dielectric constant material using a silicate.

BACKGROUND OF THE INVENTION

[0003] The trend in semiconductor device processing is to make thedevices smaller so that more devices can be fabricated in a given area.This scale down affects substantially all of the device, so that eachfeature is scaled down. This is particularly problematic for the gatestructure and capacitors, because capacitance is proportional to thedielectric constant of the material situated between the two plates ofthe capacitor and effective area of the dielectric material. Inaddition, the capacitance of a structure is inversely proportional tothe distance between the two electrodes of the structure. Currently,since SiO₂ is the material of choice for gate dielectrics, the thicknessof this layer is decreased to compensate for the scaling down of thearea of the capacitor. However, this thinning of the oxide layer isbecoming problematic for a couple of reasons. First, as the thickness ofthe silicon dioxide layer is decreased to below about 3 nm, the leakagethrough the oxide becomes unacceptably high. In addition, the oxidelayer ceases to act as an effective barrier with regards to keepingdopants which are implanted into the gate electrode to increase theconductivity of the gate electrode out of the channel regions. Second,extremely thin layers, unless they are formed from a process which isself-limiting, are very difficult to reproducibly fabricate. Third, anyetching away of a thin layer, especially a gate insulator, usingsubsequent processing to etch other structures affects the thinner layermore dramatically than it would a thicker layer because a greaterpercentage of the thinner layer is removed than that of a thicker layer.

[0004] Another approach to solve this problem involves changing the gateinsulating material to one with a higher dielectric constant. Forexample, BST, PZT, TiO₂ and Ta₂O₅ are being considered for the nextgeneration of gate dielectrics. However, each of these materials poseproblems because the processing required to make these materials intoeffective gate dielectric materials conflicts with the processing ofstandard transistor structures. More specifically, each of thesematerials generally require a high temperature anneal in anoxygen-containing ambient, and this anneal can greatly degrade theunderlying substrate and any other exposed oxidizable structures.

[0005] Hence a new material needs to be used which is relatively easy toprocess using standard gate structure processing techniques and whichhas a dielectric constant higher than that of silicon dioxide (ε≈3.9).

SUMMARY OF THE INVENTION

[0006] Basically, the instant invention involves a gate structure whichincludes an oxide or a silicate layer as the gate dielectric and amethod for fabricating such a structure using chemical vapor deposition(CVD). More specifically, the gate insulator of the instant invention ispreferably comprised of ZrSiO_(x) or HfSiO_(x) (where 0<x<4), or evenZrO₂ or HfO₂. Preferably, this layer has a dielectric constant of around10 to 40 (more preferably around 15 to 30). In alternative embodiments,the dielectric layer of the instant invention can be utilized as acapacitor dielectric.

[0007] A method of fabricating an electronic device over a semiconductorsubstrate, the method comprising the steps of: forming a conductivestructure over the semiconductor substrate; and forming a layer ofhigh-dielectric constant material between the conductive structure andthe semiconductor substrate, the layer of high-dielectric constantmaterial is formed by supplying a gaseous silicon source and a secondgaseous material which is comprised of a material selected from thegroup consisting of: Hf, Zr, La, Y, Sc, Ce and any combination thereof.In an alternative embodiment, a gaseous oxygen source is also supplied.The method of instant invention may also include the step of: subjectingthe electronic device to between 600 and 900 C in an ambient.Preferably, the ambient of the anneal step is comprised of: O₂, O₃, N₂,H₂, NH₃, and any combination thereof. The gaseous silicon source is,preferably, comprised of: silane, disilane, dichlorosilane, and anycombination thereof, and may also include a carrier gas (preferablycomprised of: He, N₂, Ar, and Ne). Preferably, the second gaseousmaterial is comprised of: Zr(OC₄H₉)4, Hf(OC₄H₉)₄, Zr(NO₃)₄, Hf(NO₃)₄,ZrCl₄, HfCl₄, ZrI₄, HfCl₄, ZrBr₄, HfBr₄, Zr₂(OPri)₆(tmhd)₂,Hf₂(OPri)₆(tmhd)₂, and any combination thereof. The electronic devicemay be a capacitor or a transistor. Another embodiment of the instantinvention is a method of fabricating a high-dielectric constant materialover a semiconductor substrate, the method comprising the steps of:providing a gaseous silicon source in a chamber; providing a secondgaseous source in the chamber, the second gaseous source comprised of amaterial selected from the group consisting of: Hf, Zr, La, Y, Sc, Ceand any combination thereof. The method of the instant invention mayfurther comprise the step of: subjecting the high-dielectric constantmaterial to between 600 and 900 C in an ambient. Preferably, the annealambient is comprised of: O₂, O₃, N₂, H₂, NH₃, and any combinationthereof. The gaseous silicon source is, preferably, comprised of:silane, disilane, dichlorosilane, and any combination thereof, and mayinclude a carrier gas (preferably comprised of: He, —N₂, Ar, and Ne).Preferably, the material is comprised of: Zr(OC₄H₉)₄, Hf(OC₄H₉)₄,Zr(NO₃)4, Hf(NO₃)₄, ZrCl₄, HfCl₄, ZrI₄, HfI₄, ZrBr₄, HfBr₄,Zr₂(OPri)₆(tmhd)₂, Hf₂(OPri)₆(tmhd)₂, and any combination thereof. Thesecond gaseous source may include a source of oxygen.

BRIEF DESCRIPTION OF THE DRAWINGS

[0008]FIG. 1 is a flow diagram illustrating the method of one embodimentof the instant invention.

[0009]FIGS. 2a-2 c are cross-sectional views of a partially fabricateddevice which is processed using the method of the instant invention asis illustrated in FIG. 1.

[0010] Like reference numerals in the different figures represent likeor similar features. Features illustrated in the figures are notnecessarily to scale.

DETAILED DESCRIPTION OF THE DRAWINGS

[0011] While the following description of the instant invention iscentered around the methodology of FIG. 1 and the device structure ofFIGS. 2a-2 d, the instant invention can be used with a metal gate or anyother type of gate structure and it can be fabricated using a disposablegate (as illustrated in the cases incorporated by reference) or usingthe standard process flow as is shown. The dielectric layer of theinstant invention may also be used as the gate dielectric in adisposable gate structure process flow as is illustrated in co-pendingU.S. patent application Ser. No. ______ (assigned to TI and docketed asTI-24776P), which is herein incorporated by reference. In addition, themethodology of the instant invention and the dielectric layer formed,thereby, can be used as the dielectric between two electrodes of acapacitor.

[0012] Prior processing may be performed prior to the method of theinstant invention. This prior processing may include cleaning thesurface of the wafer 202, formation of isolation areas 204, and dopingof portions of the wafer. Isolation structures 204 are illustrated inFIGS. 2a-c as shallow trench isolation structures (STI) but any type ofisolation structure may be used. Examples of isolation structuresinclude, LOCOS, STI, and junction isolation structures.

[0013] In most standard processing regimes a thin oxide is grown on thewafer prior to the formation of the isolation structure and implantingof the substrate dopants. If a thin oxide layer is used it would,preferably, be removed prior to step 102. Preferably, the removal of thethin oxide layer is accomplished in an oxide etch, or deglaze, step.This process will, preferably, include subjecting the wafer to an HFsolution so as to remove the protective oxide while not substantiallyaffecting isolation structure 204.

[0014] Referring to step 102 of FIG. 1 and FIG. 2a, a layer 206 isblanketly formed over substrate 202. In step 102, layer 206 may not beformed on isolation structure (shown in FIG. 2a), preferably by amasking operation, it may be selectively removed from isolationstructure 204, or it may be formed on isolation structure 204 (notshown) and left there. Preferably, layer 206 will be comprised of atransition metal (such as Hf, Zr, La, Y, Sc, and/or Ce), silicon (iflayer 208 is to be a silicate) and potentially oxygen and/or nitrogen.Preferably layer 206 will be comprised of HfSiO_(x), ZrSiO_(x),LaSiO_(x), YSiO_(x), ScSiO_(x), CeSiO_(x), Hf, HfSi₂, Zr, ZrSi₂, La,LaSi_(x), Y, YSi_(x), Sc, ScSi_(x), Ce, or CeSi_(x), and is preferablyon the order of 4 to 10 nm thick (more preferably around 4 to 6 nmthick). Using the method of the instant invention, layer 206 is formedusing chemical vapor deposition. Several embodiments of the instantinvention can be used to form the silicate layer of the instantinvention.

[0015] In each of the following embodiments, the symbol M is used todesignate Hf or Zr or other such metal which have the desired propertiessimilar to Hf and Zr for this application (such as La, Y, Sc or Celisted above). Each of these embodiments utilize a precursor which iseither combined with a carrier gas (which may be comprised of He,nitrogen, argon, neon, or any combination of the above) or not.Preferably, the precursors of the embodiments of the instant inventionare comprised with a metal source, M, a silicon source (preferablysilane, disilane, and/or dichlorosilane), and possibly even a source ofoxygen and/or nitrogen. The source of oxygen can be O₂, O₃ or otheroxygen source, such as a plasma source. If a source of oxygen and/ornitrogen is not provided in the precursor, anneal step 104 can beperformed so as to incorporate oxygen and/or nitrogen into layer 206.

[0016] In one embodiment of the instant invention, a combination ofM(NO₃)₄ in gaseous form is provided into a chamber along with silane, ordisilane or dichliorosilane, (along with a carrier gas—preferably around10% of this gas mixture) in gaseous form. Preferably, the flow rate ofM(NO₃)₄ is around 5 to 20 sccm (more preferably around 10 sccm) and theflow rate of the silane (and carrier gas) is around 1 to 20 sccm (morepreferably around 1 to 10 sccm). The ambient temperature of the chamberis around 60 to 120 C (more preferably around 70 C). An advantage ofthis precursor of the instant invention is that it is carbon-free and itis less likely to form excess water.

[0017] In another embodiment of the instant invention, a combination ofmetal t-butoxide, M(OC₄H₉)₄, (preferably along with a carrier gas) ingaseous form is provided into a chamber along with silane (preferablyalong with a carrier gas—preferably around 10% of the carrier gas and90% silane) in gaseous form. Preferably, the flow rate of M(OC₄H₉)₄ isaround 5 to 15 sccm (more preferably around 10 sccm) and the flow rateof the silane (and carrier gas) is around 1 to 20 sccm (more preferablyaround 1 to 10 sccm). Disilane or dichlorosilane can be used in place ofthe silane. The ambient temperature of the chamber is preferably around60 to 120 C (more preferably around 70 C).

[0018] In another embodiment of the instant invention, the gaseous metalsource may be comprised of MCl₄, MI₄, or MBr₄. The gaseous siliconsource may be comprised of silane, disilane, or dichlorosilane and mayfurther comprise a carrier gas such as He, Ar, N₂, or Ne. Additionally,a gaseous oxygen source (such as O₂ or O₃) may be included or asubsequent anneal in an oxygen or ozone ambient may be performed (suchas in optional anneal step 104). Since chlorine and bromine are veryreactive, and since chlorine is corrosive, if either of these gases areused, a non-stainless steel reactor (preferably a quartz reactor) shouldbe used.

[0019] In another embodiment of the instant invention, the gaseous metalsource is comprised of M₂(OPri)₆(tmhd)₂ and the silicon source ispreferably comprised of silane, disilane, or dichlorosilane. An oxygensource may be used or an anneal in an oxygen or ozone ambient may beperformed (such as in step 104).

[0020] Referring to step 104 of FIG. 1 and FIG. 2b, an anneal isperformed next, if at all, so as to improve the electrical properties oflayer 206, which contains a combination of silicon and the transitionmetal, or more preferably to improve the quality of already existingsilicate layer. For example, if layer 206 is comprised of Hf, HfSi₂, Zr,or ZrSi₂ it would become HfO_(x), HfSiO_(x), ZrO_(x), or ZrSiO_(x),respectively, or more preferably if the layer is already HfSiO_(x), ananneal step in forming gas (preferably using 90% N₂:10% H₂) will removethe defects in the silicate film, thereby improving the electricalproperties of the layer. Alternatively, an anneal in anoxygen-containing ambient will increase the oxygen content of thesilicate by increasing the x value. Preferably, anneal step 104 iseither performed: in an 90% N₂:10% H₂ ambient at a temperature around350 to 500 C (more preferably around 450 C) for around 10 to 30 minutes(more preferably 30 minutes); in an O₂ ambient at a temperature around400 to 900 C (more preferably around 800 C) for around 15 to 60 seconds(preferably around 30 seconds); in an O₃ ambient at a temperature around25 to 400 C; or in an N₂ or NH₃ ambient at a temperature around 500 to600 C. Other temperature and ambient combinations may be used but theseseem to give the best results. Preferably, layer 206 is subjected tothis elevated temperature in an oxygen-containing and/ornitrogen-containing atmosphere for a period of between 10 and 120seconds (more preferably around 20 to 45 seconds—even more preferablyaround 30 seconds) in anneal step 104.

[0021] Referring to step 106 of FIG. 1 and to FIG. 2c, a conductive gateelectrode layer 210 is formed. Preferably, layer 210 is comprised ofpolycrystalline silicon, polycrystalline silicon germanium, dopedpolycrystalline silicon, doped polycrystalline silicon germanium,tungsten, titanium, tungsten nitride, titanium nitride, platinum,aluminum, a combination thereof or a stack comprised of one or more ofthe above. Layer 210 is preferably formed using standard semiconductorprocessing steps and is of a thickness which is commonly used instandard transistor formation.

[0022] Although specific embodiments of the present invention are hereindescribed, they are not to be construed as limiting the scope of theinvention. Many embodiments of the present invention will becomeapparent to those skilled in the art in light of methodology of thespecification. The scope of the invention is limited only by the claimsappended.

What we claim is:
 1. A method of fabricating an electronic device over a semiconductor substrate, said method comprising the steps of: forming a conductive structure over said semiconductor substrate; and forming a layer of high-dielectric constant material between said conductive structure and said semiconductor substrate, said layer of high-dielectric constant material is formed by supplying a gaseous silicon source and a second gaseous material which is comprised of a material selected from the group consisting of: Hf, Zr, La, Y, Sc, Ce and any combination thereof.
 2. The method of claim 1, wherein said layer of high-dielectric constant material is formed by also supplying a gaseous oxygen source.
 3. The method of claim 1, further comprising the step of: subjecting said electronic device to between 600 and 900 C in an ambient.
 4. The method of claim 3, wherein said ambient is comprised of a gas selected from the group consisting of: O₂, O₃, N₂, H₂, NH₃, and any combination thereof.
 5. The method of claim 1, wherein said gaseous silicon source is comprised of a gas selected from the group consisting of: silane, disilane, dichlorosilane, and any combination thereof.
 6. The method of claim 5, wherein said gaseous silicon source includes a carrier gas.
 7. The method of claim 6, wherein said carrier gas is comprised of a gas selected from the group consisting of: He, N₂, Ar, and Ne.
 8. The method of claim 1, wherein said second gaseous material is comprised of a gas consisting of: Zr(OC₄H₉)₄, Hf(OC₄H₉)₄, Zr(NO₃)₄, if(NO₃)₄, ZrCl₄, HfCI₄, ZrI₄, HfI₄, ZrBr₄, HfBr₄, Zr₂(OPri)₆(tmhd)₂, Hf₂(OPri)₆(tmhd)₂, and any combination thereof.
 9. The method of claim 1, wherein said electronic device is a capacitor or a transistor.
 10. A method of fabricating a high-dielectric constant material over a semiconductor substrate, said method comprising the steps of: providing a gaseous silicon source in a chamber; providing a second gaseous source in said chamber, said second gaseous source comprised of a material selected from the group consisting of: Hf, Zr, La, Y, Sc, Ce and any combination thereof.
 11. The method of claim 10, further comprising the step of: subjecting said high-dielectric constant material to between 600 and 900 C in an ambient.
 12. The method of claim 11, wherein said ambient is comprised of a gas selected from the group consisting of: O₂, O₃, N₂, H₂, NH₃, and any combination thereof.
 13. The method of claim 10, wherein said gaseous silicon source is comprised of a gas selected from the group consisting of: silane, disilane, dichlorosilane, and any combination thereof.
 14. The method of claim 13, wherein said gaseous silicon source includes a carrier gas.
 15. The method of claim 14, wherein said carrier gas is comprised of a gas selected from the group consisting of: He, N₂, Ar, and Ne.
 16. The method of claim 10, wherein said material is comprised of a gas consisting of: Zr(OC₄H₉)₄, Hf(OC₄H₉)₄, Zr(NO₃)₄, Hf(NO₃)₄, ZrCl₄, HfCl₄, ZrI₄, HfI₄, ZrBr₄, HfBr₄, Zr₂(OPri)₆(tmhd)₂, Hf₂(OPri)₆(tmhd)₂, and any combination thereof.
 17. The method of claim 1, wherein said second gaseous source includes oxygen. 